Terasic's Stratix V TR5-Lite FPGA Development Kit with X2Y® capacitors

Bypass Capacitor Characterization

These application notes explain how to measure capacitor parameters for different applications, and provide comparative performance metrics between X2Y and competing devices. Both raw-component and via-mounted data is shown, as well as inductance extraction methodology.

PCB Mounting Techniques for Bypass Capacitors

These papers explain how to optimize capacitor performance by minimizing inductance with proper capacitor mounting and PCB stack-up practices.

High Performance Bypass Capacitor Application Design Methods and Examples

These papers demonstrate power supply bypass design techniques, provide a Bypass Network Synthesis Procedure, and show real world performance examples using X2Y® capacitors.

X2Y® Spice Model/Simulation Options

These links and papers are sources of SPICE models for X2Y® components and design tools that incorporate an X2Y® component library within the tool for circuit design analysis.

Component Model

The links below lead to downloadable zip files of the X2Y® HSPICE models for PC and UNIX and iSPICE models for PC from our various manufacturers. An equivalent circuit file for the models is also provided.

Component Model

Cadence Allegro® PCB PI OPTION, Release 15.7, Cadence® Allegro® PCB SI provides an integrated high-speed design and analysis environment for engineers creating complex digital PCB systems. Allegro® PCB PI option provides power integrity design and analysis at all frequency ranges of interest.


PI Advisor™, an optional tool for ANSYS SIWAVE™, is a full-wave electromagnetic field solver that automatically optimizes power distribution systems. ANSYS SIWAVE™ now provides a library of low-inductance X2Y® capacitors for simulation analysis in product designs


Altera’s Power Distribution Network (PDN) Design Tool is a graphical tool used with Altera® FPGAs to optimize the board-level PDN. The tool incorporates a library of low-inductance X2Y® capacitors and an “X2Y_Mount” tab to optimize mounting inductance. Altera’s AN 574 appnote describes PDN design methodology in detail.

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